1. Field of the Invention
The present invention relates to a non-volatile semiconductor memory, and more particularly to a Flash memory with multi-level cells used for 2-level/4-level switchable Flash memory.
2. Description of the Related Art
Flash memories with two levels (hereinafter denoted by 2-level data) have been widely used. However, when Flash memories with three or more levels (multi-level), for example, 4-level (hereinafter denoted by 4-level data) are produced, characteristics of reference cells and increase of an area of sense amplifiers will become serious problems. These problems will be described below.
FIG. 23 shows two threshold voltage distributions of a Flash memory which includes an array of memory cells (2-level cells) capable of storing 2-level data “0” and
FIG. 24 also shows four threshold voltage distributions of a Flash memory which includes an array of memory cells (4-level cells) capable of storing 4-level data “0”, “1”, “2” and “3”. This has been already disclosed in M. Bauer et al., “A multi-level cell 32 Mb Flash memory,” ISSCC digest of technical papers, pp. 132-3, 1995.
It will be understood from FIGS. 23 and 24 that the distribution width and interval of the threshold voltages must be tight in the 4-level cells as compared with the 2-level cells.
FIG. 25 shows a relation between agate voltage Vg and a drain current Id (cell current per unit load current) in both memory cells and reference cells of 2-level cell Flash memory.
In the Vg-Id characteristics of the memory cells, data “1” are given when the number of electrons stored in a floating gate is comparatively large, namely, the threshold voltage Vth is high, and data “0” are given when the number of electrons thereof is comparatively small, namely, the threshold voltage Vth is low. That is, the memory cells storing data “1” are denoted by cells “1”, while the memory cells storing data “0” are denoted by cells “0”.
The cell current Iref flowing through the reference cell is approximately half as compared with the cell current Icell of the memory cell. That is, the current Iref of the reference cell is set so as to have approximately half of the cell current cell of the memory cell. Accordingly, the difference between the cell currents Icell and Iref is approximately equal in “0” and “1” when the gate voltage is equal to a read voltage. The current difference is converted into a voltage difference, thereby reading out cell data by a sense amplifier for providing digital signals of “0”/“1”.
FIG. 26 represents Vg-Id characteristics of the memory cells in 4-level Flash memories, which shows portions corresponding to a part (“0”, “1”, “2”) of 4-level data “0”, “1”, “2” and “3”.
In FIG. 26, twelve characteristics show those of upper and lower limits in respective distributions of data “0”, “1” and “2” for every two characteristics in the case of high and low temperatures. It will be apparent that the temperature dependence of the Vg-Id characteristics of the cell current Icell is considerably high.
If the characteristics of 2-level reference cell are applied to those of 4-level reference cell as it is, the temperature change in Iref will become half of that in Icell, because Icell is about half of Icell as described above.
Icell have the highest temperature change in the case where it corresponds to “0”, while having the lowest temperature change in the case where it corresponds to “3” (not shown). This means that the characteristics of conventional 2-level reference cells are applied in the case of “3” as it is, but that those of 2-level reference cells are not applied in the case of “0”, “1” and “2”, respectively.
Since three sense amplifiers are required in order to enable that 4-level cells are readout in the memories for reading 2-level cells as disclosed in C. Calligaro et al., “Comparative analysis of sensing schemes for multilevel non-volatile memories,” Proceedings of Second Annual IEEE International conference on innovative systems in silicon, pp 266-73, 1997, the area of the memories will be increased as compared with that of 2level cell memories.
In the conventional non-volatile memories, as described above, when the characteristics of 2-level reference cells are applied in the case of 4-level cells as it is, the conventional technique can be applied to data “3”, but can not be applied to data “0”, “1” and “2”, respectively. Further, when the memory cells are provided to have a switchable mode of 2-level mode/4-level mode, thereby reading out the 4-level mode, the area of the sense amplifiers will be increased as compared with the case for reading out the 2-level cells.